Datasheet Details
| Part number | ICS87421I |
|---|---|
| Manufacturer | Integrated Device Technology |
| File Size | 285.31 KB |
| Description | DIFFERENTIAL-TO-LVDS CLOCK GENERATOR |
| Datasheet |
 ICS87421I Datasheet
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General Description
The ICS87421I is a high perfor mance ÷1/÷2 IC S Differential-to-LVDS Clock Generator and a memHiPerClockS™ ber of the HiPerClockS™ family of High Performance Clock Solutions from IDT.
The CLK, nCLK pair can accept most standard differential input levels.
Key Features
- One differential LVDS output.
- One differential CLK, nCLK input pair.
- CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL.
- Maximum clock input frequency: 1GHz.
- Translates any single ended input signal (LVCMOS, LVTTL, GTL) to LVDS levels with resistor bias on nCLK input.
- Part-to-part skew: 500ps (maximum).
- Propagation delay: 1.7ns (maximum).
- Additive phase jitter, RMS @ 155.52MH.