Datasheet Details
| Part number | IDT54FCT162511AT |
|---|---|
| Manufacturer | Integrated Device Technology |
| File Size | 204.86 KB |
| Description | FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY |
| Datasheet |
 IDT54FCT162511AT Datasheet
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General Description
The FCT162511AT/CT 16-bit registered/latched transceiver with parity is built using advanced dual metal CMOS technology.
type latches and D-type flip-flops to allow data flow in transparent, latched or clocked modes.
Key Features
- 0.5 MICRON CMOS Technology Typical tsk(o) (Output Skew) < 250ps, clocked mode Low input and output leakage ≤1µA (max) ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack Extended commercial range of.
- 40°C to +85°C VCC = 5V ±10% Balanced Outp.