IDT72821 Overview
72801/72811/72821/72831/72841 are dual synchronous (clocked) FIFOs. The device is functionally equivalent to two 72201/72211/72221/72231/72241 FIFOs in a single package with all associated control, data, and flag lines assigned to separate pins. Each input port is controlled by a free-running clock(WCLKA, WCLKB), and two write enable pins (WENA1, WENA2, WENB1, WENB2).
IDT72821 Key Features
- The 72801 is equivalent to two 72201 256 x 9 FIFOs
- The 72811 is equivalent to two 72211 512 x 9 FIFOs
- The 72821 is equivalent to two 72221 1024 x 9 FIFOs
- The 72831 is equivalent to two 72231 2048 x 9 FIFOs
- The 72841 is equivalent to two 72241 4096 x 9 FIFOs
- Offers optimal bination of large capacity, high speed, design flexibility and small footprint
- Ideal for prioritization, bidirectional, and width expansion
IDT72821 Applications
- 15 ns read/write cycle time FOR THE 72801/72811
- 20 ns read/write cycle time FOR THE 72821/72831/72841
- Separate control lines and data lines for each FIFO
- Separate empty, full, programmable almost-empty and almost-full flags for each FIFO
- Enable puts output data lines in high-impedance state