IDT82V3001A Description
The IDT82V3001A is a WAN PLL with single reference input. It contains a Digital Phase-Locked Loop (DPLL), which generates ST-BUS clocks and framing signals that are phase locked to a 2.048 MHz, 1.544 MHz or 8 kHz input reference. The IDT82V3001A is pliant with AT&T TR62411, Telcordia GR1244-CORE Stratum 4 Enhanced and Stratum 4, ETSI ETS 300 011.
IDT82V3001A Key Features
- Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces
- Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface
- Selectable input reference signal: 8 kHz, 1.544 MHz or 2.048 MHz
- Provides six types of 8 kHz framing pulses: F0o, F8o, F16o, F32o, RSP and TSP
- Holdover frequency accuracy of 0.025 ppm
- Phase slope of 5 ns/125 µs
- Attenuates wander from 2.1 Hz Fast Lock mode Provides Time Interval Error (TIE) correction MTIE of 600 ns JTAG boundary
- 1 Block Diagram