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IDTCSPT855 - 2.5V PHASE LOCKED LOOP CLOCK DRIVER

Datasheet Summary

Description

The CSPT855 is a high-performance, low-skew, low-jitter zero delay buffer that distributes one differential clock input pair(CLK, CLK ) to four differential output pairs (Y [0:3], Y [0:3]) and one differential pair of feedback clock outputs (FBOUT, FBOUT).

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Datasheet Details

Part number IDTCSPT855
Manufacturer Integrated Device Technology
File Size 105.40 KB
Description 2.5V PHASE LOCKED LOOP CLOCK DRIVER
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IDTCSPT855 2.5V PLL CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES www.DataSheet4U.com 2.5V PHASE LOCKED LOOP CLOCK DRIVER IDTCSPT855 • PLL clock driver for DDR (Double Data Rate) synchronous DRAM applications • Spread spectrum clock compatible • Operating frequency: 60MHz to 180MHz • Low jitter (cycle-to-cycle): ±50ps • Distributes one differential clock input to four differential clock outputs • Enters low power mode and 3-state outputs when input CLK signal is less than 20MHz or PWRDWN is low • Operates from dual 2.
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