Datasheet Summary
IDT79R3051/79R3052 RISControllers™
Integrated Device Technology, Inc.
IDT79R3051™ , 79R3051E IDT79R3052™ , 79R3052E
Features
:
- Instruction set patible with IDT79R3000A and IDT79R3001 MIPS RISC CPUs
- High level of integration minimizes system cost, power consumption
- IDT79R3000A /IDT79R3001 RISC Integer CPU
- R3051 Features
4KB of Instruction Cache
- R3052 Features
8KB of Instruction Cache
- All devices feature 2kB of Data Cache
- “E” Versions (Extended Architecture) feature full function Memory Management Unit, including 64entry Translation Lookaside Buffer (TLB)
- 4-deep write buffer eliminates memory write stalls
- 4-deep read buffer supports burst refill from slow memory devices
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