41C16257 Datasheet | ISSI

FEATURES - - - - - - Fast access and cycle time TTL patible inputs and outputs Refresh Interval: 512 cycles/8 ms Refresh Mode: RAS-Only, CAS-before-RAS (CBR), and Hidden JEDEC standard pinout Single power supply: -- 5V ± 10% (IS41C16257) -- 3.3V ± 10% (IS41LV16257) Byte Write and Byte Read operation via two CAS Industrial temperature available ISSI MAY 1999 ® DESCRIPTION The ISSI IS41C16257 and the IS41LV16257 are 262,144 x 16-bit high-performance CMOS Dynamic Random Access Memories. Fast Page Mode allows 512 random accesses within a single row with access cycle time as short as 12 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes these devices ideal for use in 16- and 32-bit wide data bus systems. These features make the IS41C16257 and the IS41LV16257 ideally suited for high band-width graphics, digital signal processing, high-performance puting systems, and peripheral applications. The IS41C16257 and the IS41LV16257 are packaged in a 40-pin, 400-mil SOJ and TSOP (Type II). - - KEY TIMING PARAMETERS Parameter Max. RAS Access Time (t RAC) Max. CAS Access Time (t CAC) Max. Column Address Access Time (t AA) Min. Fast Page Mode Cycle Time (t PC) Min. Read/Write Cycle Time (t RC) -35 35 10 18 12 60 -60 60 15 30 25 110 Unit ns ns ns ns ns ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc. Integrated Silicon Solution, Inc. - 1-800-379-4774 DR004-1B 05/24/99 IS41C16257 IS41LV16257 FUNCTIONAL BLOCK DIAGRAM OE WE LCAS UCAS CAS CLOCK GENERATOR WE CONTROL LOGICS OE CONTROL LOGIC OE ISSI CAS WE ® RAS CLOCK GENERATOR DATA I/O BUS REFRESH COUNTER DATA I/O BUFFERS ROW DECODER COLUMN DECODERS SENSE AMPLIFIERS I/O0-I/O15 MEMORY ARRAY 262,144 x 16 ADDRESS BUFFERS A0-A8 PIN CONFIGURATIONS 40-Pin TSOP (Type...