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IS61SP6464 - 64K x 64 SYNCHRONOUS PIPELINE STATIC RAM

General Description

static RAM designed to provide a burstable, high-performance, secondary cache for the i486™, Pentium™, 680X0™, and PowerPC™ microprocessors.

It is organized as 65,536 words by 64 bits, fabricated with ISSI's advanced CMOS technology.

Key Features

  • Fast access time:.
  • 117, 100 MHz.
  • Internal self-timed write cycle.
  • Individual Byte Write Control and Global Write.
  • Clock controlled, registered address, data and control.
  • Pentium™ or linear burst sequence control using MODE input.
  • Five chip enables for simple depth expansion and address pipelining.
  • Common data inputs and data outputs.
  • Power-down control by ZZ input.
  • JEDEC 128-Pin TQFP 14mm x 20mm package.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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IS61SP6464 64K x 64 SYNCHRONOUS PIPELINE STATIC RAM FEATURES • Fast access time: – 117, 100 MHz • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Pentium™ or linear burst sequence control using MODE input • Five chip enables for simple depth expansion and address pipelining • Common data inputs and data outputs • Power-down control by ZZ input • JEDEC 128-Pin TQFP 14mm x 20mm package • Single +3.