Description
for x32
A0-A11 A0-A7 BA0, BA1 DQ0
DQ31 CK, CK CKE CS CAS
RAS
Row Address Input
Column Address Input
Bank Select Address
Data I/O
System Clock Input
Clock Enable
Chip Select
Column Address Strobe Command
Row Address Strobe Command
WE DM0-DM3 DQS0-UDQS VDD VDDQ VREF VSS VSSQ NC
Write En
Features
- Double-data rate architecture; two data transfers per clock cycle.
- Bidirectional, data strobe (DQS) is transmitted/ received with data, to be used in capturing data at the receiver.
- DQS is edge-aligned with data for READs and centre-aligned with data for WRITEs.
- Differential clock inputs (CK and CK).
- DLL aligns DQ and DQS transitions with CK
transitions.
- Commands entered on each positive CK edge;
data and data mask referenced to both e.
IS43R32400D Datasheet
