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IS61DDP2B24M18A - 72Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM

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Integrated Silicon Solution

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IS61DDP2B24M18A 72Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM by Integrated Silicon Solution - Datasheet Preview — Datasheet preview – IS61DDP2B24M18A

Datasheet Details

Part number	IS61DDP2B24M18A
Manufacturer	Integrated Silicon Solution
File Size	694.99 KB
Description	72Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM
Datasheet	IS61DDP2B24M18A Datasheet
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IS61DDP2B24M18A Product details

Description

2Mx36 and 4Mx18 configuration available.

On-chip Delay-Locked Loop (DLL) for wide data valid window.

Common I/O read and write ports.

operation.

Double Data Rate (DDR) interface for read and write input ports.

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Other Datasheets by Integrated Silicon Solution

IS61DDP2B24M18A1 - 72Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM
IS61DDP2B24M18A2 - 72Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM
IS61DDP2B21M18A - 18Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM
IS61DDP2B21M18A1 - 18Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM
IS61DDP2B21M18A2 - 18Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM
IS61DDP2B21M36A - 36Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM
IS61DDP2B21M36A1 - 36Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM
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Published: Jul 25, 2016 |