Datasheet Details
| Part number | IS61DDP2B24M18A2 |
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| Manufacturer | Integrated Silicon Solution |
| File Size | 694.99 KB |
| Description | 72Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM |
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This page provides the datasheet information for the IS61DDP2B24M18A2, a member of the IS61DDP2B24M18A 72Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM family.
| Part number | IS61DDP2B24M18A2 |
|---|---|
| Manufacturer | Integrated Silicon Solution |
| File Size | 694.99 KB |
| Description | 72Mb DDR-IIP (Burst 2) CIO SYNCHRONOUS SRAM |
| Datasheet |
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|
2Mx36 and 4Mx18 configuration available.
On-chip Delay-Locked Loop (DLL) for wide data valid window.
Common I/O read and write ports.
operation.
Double Data Rate (DDR) interface for read and write input ports.