IS61DDPB24M18B2
IS61DDPB24M18B2 is 72Mb DDR-IIP CIO SYNCHRONOUS SRAM manufactured by ISSI.
IS61DDPB24M18B/B1/B2 IS61DDPB22M36B/B1/B2
4Mx18, 2Mx36 72Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM
(2.5 Cycle Read Latency)
DECEMBER 2015
Features
DESCRIPTION
- 2Mx36 and 4Mx18 configuration available.
- On-chip Delay-Locked Loop (DLL) for wide data valid window.
- mon I/O read and write ports.
- Synchronous pipeline read with self-timed late write operation.
- Double Data Rate (DDR) interface for read and write input ports.
- 2.5 cycle read latency.
- Fixed 2-bit burst for read and write operations.
- Clock stop support.
- Two input clocks (K and K#) for address and control registering at rising edges only.
- Two echo clocks (CQ and CQ#) that are delivered simultaneously with data.
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