Datasheet Details
| Part number | IS61DDPB251236A |
|---|---|
| Manufacturer | Integrated Silicon Solution |
| File Size | 509.49 KB |
| Description | 18Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM |
| Datasheet |
 IS61DDPB251236A Datasheet
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This page provides the datasheet information for the IS61DDPB251236A, a member of the IS61DDPB21M18A 18Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM family.
| Part number | IS61DDPB251236A |
|---|---|
| Manufacturer | Integrated Silicon Solution |
| File Size | 509.49 KB |
| Description | 18Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM |
| Datasheet |
IS61DDPB251236A Datasheet
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512Kx36 and 1Mx18 configuration available.
On-chip Delay-Locked Loop (DLL) for wide data valid window.
Common I/O read and write ports.
Synchronous pipeline read with self-timed late write operation.
Double Data Rate (DDR) interface for read and write input ports.