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IS61NLP204818A Datasheet 36mb State Bus Sram

Manufacturer: ISSI (now Infineon)

Overview: IS61NLP102436A/IS61NVP102436A IS61NLP204818A/IS61NVP204818A 1Mb x 36 and 2Mb x 18 36Mb, PIPELINE 'NO WAIT' STATE BUS SRAM FEBRUARY.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The 36 Meg 'NLP/NVP' product family

Key Features

  • 100 percent bus utilization.
  • No wait cycles between Read and Write.
  • Internal self-timed write cycle.
  • Individual Byte Write Control.
  • Single R/W (Read/Write) control pin.
  • Clock controlled, registered address, data and control.
  • Interleaved or linear burst sequence control using MODE input.
  • Three chip enables for simple depth expansion and address pipelining.
  • Power Down mode.
  • Common data inputs and data output.

More Datasheets from ISSI (now Infineon)

Part Number Description
IS61NLP204836B PIPELINE (NO WAIT) STATE BUS SRAM
IS61NLP102436A 36Mb STATE BUS SRAM
IS61NLP409618B PIPELINE (NO WAIT) STATE BUS SRAM
IS61NLF204836B FLOW THROUGH (NO WAIT) STATE BUS SRAM
IS61NLF409618B FLOW THROUGH (NO WAIT) STATE BUS SRAM
IS61NLF51236 STATE BUS SRAM
IS61NSCS25672 Synchronous SRAM
IS61NSCS51236 Synchronous SRAM
IS61NVF102418 STATE BUS SRAM
IS61NVF204836B FLOW THROUGH (NO WAIT) STATE BUS SRAM

IS61NLP204818A Distributor