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IS61VPD25636A - 256K x 36 - 512K x 18 9 Mb SYNCHRONOUS PIPELINED DOUBLE CYCLE DESELECT STATIC RAM

Download the IS61VPD25636A datasheet PDF. This datasheet also covers the IS61LPD25636A variant, as both devices belong to the same 256k x 36 - 512k x 18 9 mb synchronous pipelined double cycle deselect static ram family and are provided as variant models within a single manufacturer datasheet.

General Description

are high-speed, low-power synchronous static RAMs designed to provide burstable, high-performance memory for communication and networking applications.

Key Features

  • Internal self-timed write cycle.
  • Individual Byte Write Control and Global Write.
  • Clock controlled, registered address, data and control.
  • Burst sequence control using MODE input.
  • Three chip enable option for simple depth expansion and address pipelining.
  • Common data inputs and data outputs.
  • Auto Power-down during deselect.
  • Double cycle deselect.
  • Snooze MODE for reduced-power standby.
  • JTAG Boundary Scan for.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS61LPD25636A_IntegratedSiliconSolution.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number IS61VPD25636A
Manufacturer ISSI (now Infineon)
File Size 253.24 KB
Description 256K x 36 - 512K x 18 9 Mb SYNCHRONOUS PIPELINED DOUBLE CYCLE DESELECT STATIC RAM
Datasheet download datasheet IS61VPD25636A Datasheet

📁 Similar Datasheet

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IS61VPS102436B 36Mb Single CYCLE DESELECT STATIC RAM ISSI
IS61VPS12832EC SINGLE CYCLE DESELECT SRAM ISSI
IS61VPS12836EC SINGLE CYCLE DESELECT SRAM ISSI
IS61VPS204818B 36Mb Single CYCLE DESELECT STATIC RAM ISSI
IS61VPS25618EC SINGLE CYCLE DESELECT SRAM ISSI

Other Datasheets by ISSI (now Infineon)

Part Number Description
IS61VPD25636A 256K x 36/ 512K x 18 9Mb SYNCHRONOUS PIPELINED / DOUBLE CYCLE DESELECT STATIC RAM
IS61VPD102418A 512K x 36 - 1024K x 18 18Mb SYNCHRONOUS PIPELINED DOUBLE CYCLE DESELECT STATIC RAM
IS61VPD102418A 512K x 36/ 1024K x 18 18Mb SYNCHRONOUS PIPELINED / DOUBLE CYCLE DESELECT STATIC RAM
IS61VPD51218A 256K x 36 - 512K x 18 9 Mb SYNCHRONOUS PIPELINED DOUBLE CYCLE DESELECT STATIC RAM
IS61VPD51218A 256K x 36/ 512K x 18 9Mb SYNCHRONOUS PIPELINED / DOUBLE CYCLE DESELECT STATIC RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
IS61VPD25636A IS61LPD25636A IS61VPD51218A IS61LPD51218A 256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM www.DataSheet4U.com ISSI MAY 2005 ® FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs and data outputs • Auto Power-down during deselect • Double cycle deselect • Snooze MODE for reduced-power standby • JTAG Boundary Scan for PBGA package • Power Supply LPD: VDD 3.3V + 5%, VDDQ 3.3V/2.5V + 5% VPD: VDD 2.5V + 5%, VDDQ 2.