Datasheet Summary
80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT s High-Performance Embedded Architecture
- 25 MIPS Burst Execution at 25 MHz
- 9.4 MIPS- Sustained Execution at 25 MHz s 512-Byte On-Chip Instruction Cache
- Direct Mapped
- Parallel Load/Decode for Uncached Instructions s Multiple Register Sets
- Sixteen Global 32-Bit Registers
- Sixteen Local 32-Bit Registers
- Four Local Register Sets Stored On-Chip
- Register Scoreboarding s 4 Gigabyte, Linear Address Space s Pin patible with 80960KA s Built-in Interrupt Controller
- 31 Priority Levels, 256 Vectors
- 3.4 µs Latency @ 25 MHz s Easy to Use, High Bandwidth 32-Bit Bus
- 66.7 Mbytes/s Burst
- Up to 16 Bytes...