Datasheet Summary
80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS s High-Performance Embedded s Pin patible with 80960SB s Built-in Interrupt Controller
Architecture
- 20 MIPS- Burst Execution at 20 MHz
- 7.5 MIPS Sustained Execution at 20 MHz s 512-Byte On-Chip Instruction Cache
- Direct Mapped
- Parallel Load/Decode for Uncached Instructions s Multiple Register Sets
- Sixteen Global 32-Bit Registers
- Sixteen Local 32-Bit Registers
- Four Local Register Sets Stored On-Chip
- Register Scoreboarding
- 4 Direct Interrupt Pins
- 31 Priority Levels, 256 Vectors s Easy to Use, High Bandwidth 16-Bit Bus
- 32 Mbytes/s Burst
- Up to 16 Bytes Transferred per Burst s 32-Bit Address Space, 4...
