Datasheet Summary
PRELIMINARY
8XC251SA/SB/SP/SQ HIGH-PERFORMANCE CHMOS MICROCONTROLLER mercial/Express s Real-time and Programmed Wait State Bus Operation s Binary-code patible with MCS® 51 s Pin patible with 44-pin PLCC and 40pin PDIP MCS 51 Sockets s Register-based MCS® 251 Architecture
- 40-byte Register File
- Registers Accessible as Bytes, Words, or Double Words s Enriched MCS 51 Instruction Set
- 16-bit and 32-bit Arithmetic and Logic Instructions
- pare and Conditional Jump Instructions
- Expanded Set of Move Instructions s Linear Addressing s 256-Kbyte Expanded External Code/Data Memory Space s ROM/OTPROM/EPROM Options: 16 Kbytes (SB/SQ), 8 Kbytes (SA/SP), or without ROM/OTPROM/EPROM s...