Introduction CLOCK GENERATOR Oscillator Clock Generator READY Synchronization RESET Logic LOCAL BUS CONTROLLER Memory Peripheral Control Local Bus Arbitration Local Bus Controller and Reset PERIPHERAL ARCHITECTURE Chip-Select Ready Generation Logic DMA Channels Timers Interrupt Controller PAGE
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80186 80188 HIGH-INTEGRATION 16-BIT MICROPROCESSORS
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Integrated Feature Set Enhanced 8086-2 CPU Clock Generator 2 Independent DMA Channels Programmable Interrupt Controller 3 Programmable 16-bit Timers Programmable Memory and Peripheral Chip-Select Logic Programmable Wait State Generator Local Bus Controller Available in 10 MHz and 8 MHz Versions High-Performance Processor 4 Mbyte Sec Bus Bandwidth Interface 8 MHz (80186) 5 Mbyte Sec Bus Bandwidth Interface 10 MHz (80186)
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Direct Addressing Capability to 1 Mbyte of Memory and 64 Kbyte I O Completely Object Code Compatible with All Existing 8086 8088 Software 10 New Instruction Types Numerics Coprocessing Capability Through 8087 Interface Available in 68 Pin Plastic Leaded Chip Carrier (PLCC) Ceramic Pin Grid Array (PGA) Ceramic Leadle
A80186 Datasheet
