ACS630MS Overview
Description
The Intersil ACS630MS is a Radiation Hardened 16-bit parallel error detection and correction circuit. It uses a modified Hamming code to generate a 6-bit check word from each 16-bit data word.
Key Features
- Devices QML Qualified in Accordance with MIL-PRF-38535
- Detailed Electrical and Screening Requirements are Contained in SMD# 5962-96711 and Intersil’ QM Plan
- 1.25 Micron Radiation Hardened SOS CMOS
- Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
- Single Event Upset (SEU) Immunity: <1 x 10 (Typ)
- Dose Rate Upset . . . . . . . . . . . . . . . . >10
- Dose Rate Survivability . . . . . . . . . . . >10
- Latch-Up Free Under Any Conditions
- Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC
- Significant Power Reduction Compared to ALSTTL Logic
