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CD40105BMS - CMOS FIFO Register

General Description

CD40105BMS is a low-power first-in-first-out (FIFO) “elastic” storage register that can store 16 4-bit words.

It is capable of handling input and output data at different shifting rates.

This feature makes it particularly useful as a buffer between asynchronous systems.

Key Features

  • 4 Bits x 16 Words.
  • High Voltage Type (20V Rating).
  • Independent Asynchronous Inputs and Outputs.
  • 3-State Outputs.
  • Expandable in Either Direction.
  • Status Indicators on Input and Output.
  • Reset Capability.
  • Standardized Symmetrical Output Characteristics.
  • 100% Tested for Quiescent Current at 20V.
  • 5V, 10V and 15V Parametric Ratings.
  • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CD40105BMS December 1992 CMOS FIFO Register Description CD40105BMS is a low-power first-in-first-out (FIFO) “elastic” storage register that can store 16 4-bit words. It is capable of handling input and output data at different shifting rates. This feature makes it particularly useful as a buffer between asynchronous systems. Each word position in the register is clocked by a control flipflop, which stores a marker bit. A “1” signifies that the position’s data is filled and a “0” denotes a vacancy in that position. The control flip-flop detects the state of the preceding flip-flop and communicates its own status to the succeeding flip-flop.