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CDP1877 - Programmable Interrupt Controller (PIC)

General Description

The CDP1877 and CDP1877C are programmable 8-level interrupt controllers designed for use in CDP1800 series microprocessor systems.

They provide added versatility by extending the number of permissible interrupts from 1 to N in increments of 8.

Key Features

  • Compatible with CDP1800 Series.
  • Programmable Long Branch Vector Address and Vector Interval.
  • 8 Levels of Interrupt Per Chip.
  • Easily Expandable.
  • Latched Interrupt Requests.
  • Hard Wired Interrupt Priorities.
  • Memory Mapped.
  • Multiple Chip Select Inputs to Minimize Address Space Requirements Ordering Information.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CDP1877, CDP1877C March 1997 Programmable Interrupt Controller (PIC) Description The CDP1877 and CDP1877C are programmable 8-level interrupt controllers designed for use in CDP1800 series microprocessor systems. They provide added versatility by extending the number of permissible interrupts from 1 to N in increments of 8. When a high to low transition occurs on any of the PIC interrupt lines (IR0 to IR7), it will be latched and, unless the request is masked, it will cause the INTERRUPT line on the PIC and consequently the INTERRUPT input on the CPU to go low. The CPU accesses the PIC by having interrupt vector register R(1) loaded with the memory address of the PIC.