CDP68HC68S1 Datasheet PDF - Intersil Corporation Serial Multiplexed Bus Interface Specs

CDP68HC68S1 - Serial Multiplexed Bus Interface

Datasheet Summary

Description

The CDP68HC6SS1 Serial Bus Interface Chip (SBlC) provides a means of interfacing in a Small Area Network conﬁguration, various microcomputers (MCU’s) containing serial ports.

Such MCU’s include the family of 68HC05 microcontrollers.

Features

Differential Bus for Minimal EMl.
High Common Mode Noise Rejection.
Ideal for Twisted Pair Wiring.
Data Collision Detection.
Bus Arbitration.
Idle Detection.
Programmable Clock Divider.
Power-On Reset Ordering Information PART NUMBER CDP68HC68S1E CDP68HC68S1M.

Datasheet Details

Part number	CDP68HC68S1
Manufacturer	Intersil Corporation
File Size	72.90 KB
Description	Serial Multiplexed Bus Interface
Datasheet	CDP68HC68S1 Datasheet
Additional preview pages of the CDP68HC68S1 datasheet.

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Full PDF Text Transcription

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CDP68HC68S1 April 1994 Serial Multiplexed Bus Interface Description The CDP68HC6SS1 Serial Bus Interface Chip (SBlC) provides a means of interfacing in a Small Area Network conﬁguration, various microcomputers (MCU’s) containing serial ports. Such MCU’s include the family of 68HC05 microcontrollers. The SBlC provides a connection from an MCU’s Serial Communication Interface (asynchronous UART type interface) or Serial Peripheral Interface (synchronous) to a medium speed asynchronous two wire differential signal bus designed to minimize electromagnetic interference. This two wire bus forms the network bus to which all MCU’s are connected (through SBI chips). See Figure 1. Each MCU operates independently and may be added or deleted from the bus with little or no impact on bus operation.

Published: Mar 23, 2005 |