Description
The Intersil HIP7010, J1850 Byte Level Interface Circuit, is a member of the Intersil family of low-cost multiplexed wiring ICs.
Features
- Fully Supports VPW (Variable Pulse Width) Messaging Practices of SAE J1850 Standard for Class B Data Communications Network Interface - 3-Wire, High-Speed, Synchronous, Serial Interface.
- Reduces Wiring Overhead.
- Directly Interfaces with 68HC05 and 68HC11 Style SPI Ports.
- 1MHz, 8-Bit Transfers Between Host and HIP7010 Minimize Host Service Requirements.
- Automatically Transmits Properly Framed Messages.
- Prepends SOF to First Byte and Appends C.
HIP7010 Datasheet
