Datasheet Summary
August 1995
Radiation Hardened Octal Transparent Latch, Three-State
Features
Pinouts
- 3 Micron Radiation Hardened CMOS SOS
- Total Dose 200K RAD (Si)
- SEP Effective LET No Upsets: >100 MEV-cm2/mg
- Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-
Day (Typ)
- Dose Rate Survivability: >1 x 1012 RAD (Si)/s
- Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
- Latch-Up Free Under Any Conditions
- Fanout (Over Temperature Range)
- Bus Driver Outputs
- 15 LSTTL Loads
- Military Temperature Range: -55oC to +125oC
- Significant Power Reduction pared to LSTTL ICs
- DC Operating Voltage Range: 4.5V to 5.5V
- LSTTL Input patibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
- Input...