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JMD330 - Serial ATA Bridge

Description

Serial ATA Bridge Chip Contact Information Department Email Sales sales@jmicron.com Tech.

Features

  • ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ ¾ 0.18um CMOS technology. Compliance with Gen1i/Gen1m of Serial ATA II Electrical Specification 2.6. www. DataSheet. co. kr 1.8V and 3.3V power system. 25MHz external reference clock. 64-pin TQFP and QFN packages. Support ATA/ATAPI-7 specification. ATA/ATAPI PIO Mode 0, 1, 2, 3, 4. ATA/ATAPI Multi-Word DMA Mode 0, 1, 2. ATA/ATAPI Ultra DMA Mode 0, 1, 2, 3, 4, 5, 6, 7. ATA/ATAPI PACKET command feature set. ATA/ATAPI LBA48 addressing mode associated with 2-byte sector count.

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Datasheet Details

Part number JMD330
Manufacturer JMicron
File Size 140.01 KB
Description Serial ATA Bridge
Datasheet download datasheet JMD330 Datasheet
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Full PDF Text Transcription

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JMicron/JMD330 JMD330 Serial ATA Bridge Chip Overview The JMicron JMD330 Bridge is a single chip solution for serial and parallel ATA translation. It includes the Serial ATA PHY, Link, Transport, and parallel ATA (application layer) controller. The main applications are for legacy IDE storage devices connecting to newer chipset supporting serial ATA, such as the iCH5 south bridge of Intel chipset. The Serial ATA physical, link, and transport layer are compliance to Serial ATA Generation 1, which supports a 1.5Gbps data rate. The application layer supports both the ATA register command set and PACKET command set, which could drive both the Hard Disk Drive and ATAPI Optical Storage such as CR-ROM, CD-RW, DVD-ROM, DVD-RW, etc. This chip is designed by 0.
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