KK4027B
KK4027B is Dual JK Flip-Flop manufactured by Kodenshi AUK Group.
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TECHNICAL DATA
Dual JK Flip-Flop
The KK4027B is a Dual JK Flip-Flop which is edge-triggered and Features independent Set, Reset, and Clock inputs. Data is accepted when the Clock is LOW and transferred to the output on the positive-going edge of the Clock. The active HIGH asynchronous Reset and Set are independent and override the J, K, or Clock inputs. The outputs are buffered for best system performance.
- Operating Voltage Range: 3.0 to 18 V
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 n A at 18 V and 25°C
- Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply
ORDERING INFORMATION KK4027BN Plastic KK4027BD SOIC TA = -55° to 125° C for all packages
PIN ASSIGNMENT LOGIC DIAGRAM
FUNCTION TABLE
Inputs Set Reset Clock L H H L L L PIN 16 =VCC PIN 8 = GND L H L H L L L L X X X J X X X L H L H K X X X L L H H Outputs Qn+1 L H H H L Qn Qn+1 H L H L H Qn
No change
X = don’t care Qn+1 = State After Clock Positive Transition
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MAXIMUM RATINGS-
Symbol VCC VIN IIN PD Ptot Tstg TL
- Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP, SOIC Package Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Value -0.5 to +20 -0.5 to VCC +0.5 ±10 500-
- 100 -65 to +150 260
Unit V V m A m W m W °C °C
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Remended Operating Conditions.
- - Derating:
- Plastic DIP from -55 to +100°C
- SOIC Package from -55 to +65°C
- Plastic DIP:
- 10 m W/°C from +100 to +125°C
- SOIC Package: :
- 7 m W/°C from +65 to +125°C
REMENDED OPERATING CONDITIONS
Symbol VCC VIN TA Parameter DC Supply Voltage (Referenced to GND)...
