KK74AC132
KK74AC132 is Quad 2-Input NAND Gate manufactured by Kodenshi AUK Group.
TECHNICAL DATA
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Quad 2-Input NAND Gate with Schmitt-Trigger Inputs
High-Performance Silicon-Gate CMOS
The KK74AC132 is identical in pinout to the LS/ALS132, HC/HCT132. The device inputs are patible with standard CMOS outputs; with pullup resistors, they are patible with LS/ALS outputs. The KK74AC132 can be used to enhance noise immunity or to square up slowly changing waveforms.
- Outputs Directly Interface to CMOS, NMOS, and TTL
- Operating Voltage Range: 2.0 to 6.0 V
- Low Input Current: 1.0 µA; 0.1 µA @ 25°C
- High Noise Immunity Characteristic of CMOS Devices
- Outputs Source/Sink 24 m A
ORDERING INFORMATION KK74AC132N Plastic KK74AC132D SOIC TA = -40° to 85° C for all packages
LOGIC DIAGRAM PIN ASSIGNMENT
FUNCTION TABLE
Inputs A L L H H PIN 14 =VCC PIN 7 = GND B L H L H Output Y H H H L
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MAXIMUM RATINGS-
Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL
- Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Value -0.5 to +7.0 -0.5 to VCC +0.5 -0.5 to VCC +0.5 ±20 ±50 ±50 750 500 -65 to +150 260
Unit V V V m A m A m A m W °C °C
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Remended Operating Conditions. +Derating
- Plastic DIP:
- 10 m W/°C from 65° to 125°C SOIC Package: :
- 7 m W/°C from 65° to 125°C
REMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT TJ TA IOH IOL tr, tf Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Junction Temperature (PDIP) Operating Temperature, All Package Types Output Current
- High Output Current
- Low Input Rise and Fall Time (except Schmitt Inputs)
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