KK74HC123A Datasheet | Kodenshi AUK Group

TECHNICAL DATA Dual Retriggerable Monostable Multivibrator The KK74HC123A is identical in pinout to the LS/ALS123. The device inputs are patible with standard CMOS outputs; with pullup resistors, they are patible with LS/ALSTTL outputs. There are two trigger inputs, A INPUT (negative edge) and B INPUT (positive edge). These inputs are valid for rising/falling signals. The device may also be triggered by using the CLR input (positiveedge) because of the Schmitt-trigger input; after triggering the output maintains the MONOSTABLE state for the time period determined by the external resistor RX and capacitor CX. Taking CLR low breaks this MONOSTABLE STATE. If the next trigger pulse occurs during the MONOSTABLE period it makes the MONOSTABLE period longer. - Outputs Directly Interface to CMOS, NMOS, and TTL - Operating Voltage Range: 3.0 to 6.0 V - Low Input Current: 1.0 µA - High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION KK74HC123AN Plastic KK74HC123AD SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE PIN 16 =VCC PIN 8 = GND Note (1) CX, RX, DX are external ponents. (2) DX is a clamping diode. The external capacitor is charged to VCC in the stand-by state, i.e. no trigger. When the supply voltage is turned off CX is discharged mainly through an internal parasitic diode. If CX is sufficiently large and VCC decreases rapidy, there will be some possibility of damaging the I.C. with a surge current or latch-up. If the voltage supply filter capacitor is large enough and VCC decrease slowly, the surge current is automatically limited and damage the I.C. is avoided. The maximum forward current of the parasitic diode is approximately 20 m A. A Inputs B H X H L L X H X L L H L X CLR H H H H L- L - Outputs Q Q Note Output Enable H- H - Inhibit Inhibit Output Enable Output Enable Inhibit X = don’t care - - except for monostable period ..net MAXIMUM RATINGS- Symbol VCC VIN VOUT IIN...