DESCRIPTION
All multiplier inputs are user accessible, and each can be updated on every clock cycle. Independent input register clock enables allow the user to hold the data inputs over multiple clock cycles. The output of each multiplier can be independently negated under user control for subtraction of products. The sum of the products can also be internally rounded to 16 bits during the accumulation process. A separate 16-bit input port connected to the accumulator is included to allow cascading of multiple LF2249s. Access to all 24 bits of the accumulator is gained by switching between upper or lower 16-bit words. The accumulated output data is updated on every clock cycle. All inputs and outputs of the LF2249 are registered on the rising edge of clock, except for OE. Internal pipeline registers for all data and control inputs are provided to maintain FEATURES
u 40 MHz Data and Computation Rate u Two 12 x 12-bit Multipliers with Individual Data Inputs u Separate 16-bit Input Port f...
LOGIC Devices Incorporated
