LS7082 Datasheet | LSI Computer Systems

FEATURES : - x1, x2 and x4 mode selection - Up to 16 MHz output clock frequency - INDEX input and output - UP/DOWN indicator output - Programmable output clock pulse width - On-chip filtering of inputs for optical or magnetic encoder applications. - TTL and CMOS patible I/Os - +4.5V to +10.0V operation (VDD-VSS) - LS7082 (DIP); LS7082-S (SOIC ) - See Figure 1 DESCRIPTION : The LS7082 is a monolithic CMOS silicon gate quadrature clock converter. Quadrature clocks derived from optical or magnetic encoders, when applied to the A and B Inputs of the LS7082, are converted to strings of Up Clocks and Down Clocks. Pulses derived from the Index Track of an encoder, when applied to the INDX input, produce absolute position reference pulses which are synchronized to the Up Clocks and Down Clocks. These outputs can be interfaced directly with standard Up/Down counters for direction and position sensing of the encoder. INPUT/OUTPUT DESCRIPTION : VDD (Pin 1) Supply Voltage positive terminal. INDX (Pin 2) Encoder Index pulses are applied to this input. RBIAS (Pin 3) Input for external ponent connection. A resistor connected between this input and V SS adjusts the output clock pulse width (Tow). For proper operation, the output clock pulse width must be less than or equal to the A,B pulse separation (TOW ≤ TPS). VSS (Pin 4) Supply Voltage negative terminal. A (Pin 5) Quadrature Clock Input A. This input has a filter circuit to validate input logic level and eliminate encoder dither. x2 (Pin 8) A low level applied to this input selects x2 mode of operation. See Table 1 for Mode Selection Truth Table and Figure 2 for Input/Output timing relationship. B (Pin 9) Quadrature Clock Input B. This input has a filter circuit identical to input A. 7082-100600-1 V DD (+V) INDX INDX UPCK RBIAS V SS (-V) DNCK UP/DN A NC 10 x4/x1 B 9 8 FIGURE 1 7 x2 TABLE 1. MODE SELECTION TRUTH TABLE x2 Input 0 1 1 x4/x1 Input Don’t Care 0 1 MODE x2...