GAL6001 - High Performance E2CMOS FPLA Generic Array Logic

Description

Using a high performance E2CMOS technology, Lattice Semiconductor has produced a next-generation programmable logic device, the GAL6001.

Features

HIGH.

Lattice Semiconductor

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Datasheet Details

Part number	GAL6001
Manufacturer	Lattice Semiconductor
File Size	234.85 KB
Description	High Performance E2CMOS FPLA Generic Array Logic
Datasheet	GAL6001 Datasheet
Additional preview pages of the GAL6001 datasheet.

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Full PDF Text Transcription

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GAL6001 High Performance E2CMOS FPLA Generic Array Logic™ Features • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 30ns Maximum Propagation Delay — 27MHz Maximum Frequency — 12ns Maximum Clock to Output Delay — TTL Compatible 16mA Outputs — UltraMOS® Advanced CMOS Technology • LOW POWER CMOS — 90mA Typical Icc • E2 CELL TECHNOLOGY — Reconfigurable Logic — Reprogrammable Cells — 100% Tested/100% Yields — High Speed Electrical Erasure (<100ms) — 20 Year Data Retention • UNPRECEDENTED FUNCTIONAL DENSITY — 78 x 64 x 36 FPLA Architecture — 10 Output Logic Macrocells — 8 Buried Logic Macrocells — 20 Input and I/O Logic Macrocells • HIGH-LEVEL DESIGN FLEXIBILITY — Asynchronous or Synchronous Clocking — Separate State Register and Input Clock Pins — Functional Superset of Existing 24-pin PAL® and FPLA Dev

Published: Mar 23, 2005 |