ISPGDXTMFAMILY Overview
The ispGDX architecture provides a family of fast, flexible programmable devices to address a variety of systemlevel digital signal routing and interface requirements including: Multi-Port Multiprocessor Interfaces Wide Data and Address Bus Multiplexing (e.g. 4:1 High-Speed Bus MUX) Programmable Control Signal Routing (e.g.
ISPGDXTMFAMILY Key Features
- IN-SYSTEM PROGRAMMABLE GENERIC DIGITAL CROSSPOINT FAMILY
- Advanced Architecture Addresses Programmable PCB Interconnect, Bus Interface Integration and Jumper/Switch Replacement
- Three Device Options: 80 to 160 Programmable I/O Pins
- Fixed HIGH or LOW Output Option for Jumper/DIP Switch Emulation
- Space-Saving TQFP, PQFP and BGA Packaging
- Dedicated IEEE 1149.1-pliant Boundary Scan Test
- PCI pliant Output Drive
- HIGH PERFORMANCE E2CMOS® TECHNOLOGY
- 5V Power Supply
