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ISPLSI5256VE - In-System Programmable 3.3V SuperWIDE High Density PLD

Description

The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs.

Outputs from the GLBs drive the Global Routing Pool (GRP) between the GLBs.

Features

  • Second Generation SuperWIDE HIGH.

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Datasheet Details

Part number ISPLSI5256VE
Manufacturer Lattice Semiconductor
File Size 272.13 KB
Description In-System Programmable 3.3V SuperWIDE High Density PLD
Datasheet download datasheet ISPLSI5256VE Datasheet
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www.DataSheet4U.com ispLSI 5256VE ® In-System Programmable 3.3V SuperWIDE™ High Density PLD Features • Second Generation SuperWIDE HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC DEVICE — 3.3V Power Supply — User Selectable 3.3V/2.5V I/O — 12000 PLD Gates / 256 Macrocells — Up to 144 I/O Pins — 256 Registers — High-Speed Global Interconnect — SuperWIDE Generic Logic Block (32 Macrocells) for Optimum Performance — SuperWIDE Input Gating (68 Inputs) for Fast Counters, State Machines, Address Decoders, etc. — PCB Efficient Ball Grid Array (BGA) Package Options — Interfaces with Standard 5V TTL Devices • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — fmax = 165 MHz Maximum Operating Frequency — tpd = 6.0 ns Propagation Delay — TTL/3.3V/2.
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