Lattice Semiconductor ISPLSI5256VE
The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. This mechanism allows fast, efficient connections across the entire device. Each GLB contains 32 macrocells and a fully populated, programmable AND-array with 160 logic product terms and three extra control product terms.| Part No. | ISPLSI5256VE |
|---|---|
| Datasheet | ISPLSI5256VE Download |
| Manufacturer |  Lattice Semiconductor |
| Description | In-System Programmable 3.3V SuperWIDE High Density PLD |
| Buy | Stock & Price |
FEATURES
● Second Generation SuperWIDE HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC DEVICE — 3.3V Power Supply — User Selectable 3.3V/2.5V I/O — 12000 PLD Gates / 256 Macrocells — Up to 144 I/O Pins — 256 Registers — High-Speed Global Interconnect — SuperWIDE Generic Logic Block (32 Macrocells) for Optimum Performance — SuperWIDE Input Gating (68 Inputs) for Fast Counters, State Machines, Address Decoders, etc. — PCB Efficient Ball Grid Array (BGA) Package Options — Interfaces with Standard 5V TTL Devices● HIGH PERFORMANCE E2CMOS® TECHNOLOGY — fmax = 165 MHz Maximum Operating Frequency — tpd = 6.0 ns Propagation Delay — TTL/3.3V/2.5V Compatible Input Thresholds and Output Levels — Electrically Erasable and Reprogrammable — Non-Volatile — Programmable Speed/Power Logic Path Optimization
● IN-SYSTEM PROGRAMMABLE — Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality — Reprogram Soldered Devices for Faster Debugging
● 100% IEEE 1149.1 BOUNDARY SCAN TESTABLE AN...
