Datasheet Details
| Part number | ispClock5406D |
|---|---|
| Manufacturer | Lattice Semiconductor |
| File Size | 2.02 MB |
| Description | Zero Delay And Fan-Out Buffer |
| Datasheet |
 ispClock5406D Datasheet
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General Description
The ispClock5400D family integrates a CleanClock PLL and a FlexiClock Output block.
The CleanClock PLL provides an ultra-low-jitter clock source to a set of four V-dividers.
Key Features
- CleanClock™ PLL.
- Ultra Low Period Jitter 2.5ps.
- Ultra Low Phase Jitter 6.5ps.
- Fully Integrated High-Performance PLL.
- Programmable lock detect Four output dividers Programmable on-chip loop filter Compatible with Spread Spectrum clocks Internal/external feedback.
- Up to 10 Programmable Fan-out Buffers.
- Programmable differential output standards and individual enable controls - LVDS, LVPECL, HSTL, SSTL, HCSL, MLVDS.