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ispLSI® 2032E
In-System Programmable SuperFAST™ High Density PLD
Features
Functional Block Diagram
• SuperFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 1000 PLD Gates — 32 I/O Pins, Two Dedicated Inputs — 32 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic — 100% Functionally and JEDEC Upward Compatible with ispLSI 2032 Devices
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY
— fmax = 225 MHz Maximum Operating Frequency — tpd = 3.5 ns Propagation Delay
— TTL Compatible Inputs and Outputs — 5V Programmable Logic Core — ispJTAG™ In-System Programmable via IEEE 1149.1
(JTAG) Test Access Port — User-Selectable 3.
ispLSI2032E Datasheet
