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ispLSI® 2096E
In-System Programmable SuperFAST™ High Density PLD
Features
Functional Block Diagram
• SUPERFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC
— 4000 PLD Gates — 96 I/O Pins, Six Dedicated Inputs — 96 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State
Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic — 100% Functional/JEDEC Upward Compatible with
ispLSI 2096 Devices
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY
— fmax = 180 MHz Maximum Operating Frequency — tpd = 5.0 ns Propagation Delay
— TTL Compatible Inputs and Outputs — 5V Programmable Logic Core — ispJTAG™ In-System Programmable via IEEE 1149.1
(JTAG) Test Access Port — User-Selectable 3.
ispLSI2096E Datasheet
