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MACH4-96 - High-Performance EE CMOS Programmable Logic

Description

The MACH4-96/96 (M4-96/96) is a member of Vantis’ high-performance EE CMOS MACH 4 family.

Features

  • The M4-96/96 consists of six PAL® blocks interconnected by a programmable central switch matrix. The central switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the PAL blocks. This allows designs to be placed and routed efficiently. Routability is further enhanced by an input switch matrix and an output switch matrix. The input switch matrix provides input signals with alternative paths into the central switch matrix; the ou.

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Datasheet Details

Part number MACH4-96
Manufacturer Lattice
File Size 294.48 KB
Description High-Performance EE CMOS Programmable Logic
Datasheet download datasheet MACH4-96 Datasheet

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Full PDF Text Transcription

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1 FINAL MACH 4 FAMILY COM’L: -15 IND: -18 Lattice Semiconductor MACH4-96/96-15 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS x 144 Pins in PQFP x 96 Macrocells x 15 ns tPD Commercial, 18 ns tPD Industrial x 47.6 MHz fCNT x 102 Inputs with pull-up resistors x 96 I/Os; 4 dedicated inputs/clocks; 2 dedicated inputs x 96 Flip-flops x Up to 20 product terms per macrocell, with XOR x Flexible clocking MACH 4 Family x x x x x — Four global clock pins with selectable edges — Asynchronous mode available for each macrocell 3 MACH111SP-size blocks SpeedLocking™ for guaranteed fixed timing JTAG, 5-V, in-system programmable JTAG (IEEE 1149.
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