Datasheet Details
| Part number | DSP32C |
|---|---|
| Manufacturer | Lucent Technologies |
| File Size | 0.98 MB |
| Description | Digital Signal Processor |
| Download | DSP32C Download (PDF) |
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| Part number | DSP32C |
|---|---|
| Manufacturer | Lucent Technologies |
| File Size | 0.98 MB |
| Description | Digital Signal Processor |
| Download | DSP32C Download (PDF) |
|
|
|
Contents of the PDR register may fail to be transferred to memory during a DMA write operation when the falling edge of PEN or PWN aligns near the trailing edge of the output clock (CKO).
If an external device overwrites the PDR, the DMA transaction is not completed.
The status of the parallel data full (PDF) flag and associated pin may be corrupted during this transaction.
Data Sheet Addendum November 1996 DSP32C Digital Signal Processor Products Affected This advisory is effective for issue 5 of the DSP32C.
Issue 5 devices are identified by a device code of the form DSP32C-X35 (where X is replaced by R or F).
The design consideration involves external writes to and reads from the parallel data register (PDR) with a system clock greater than 66 MHz.
| Brand Logo | Part Number | Description | Manufacturer |
|---|---|---|---|
| Symmetric | DSP32C | PC/AT USER GUIDE | Symmetric |
 |
DSP32 | Dual Tone Multifrequency Receiver Digital Signal Processor | AT&T |
| Part Number | Description |
|---|---|
| DSP32C-F35 | Digital Signal Processor |
| DSP32C-M4 | Digital Signal Processor |
| DSP32C-R35 | Digital Signal Processor |