MX10FMAXDQC Datasheet | Macronix

FEATURE - - - - - - - - High performance CMOS MTP ROM CPU Operation Voltage 5V Up to 40MHz operation (3.5MHz to 40MHz) Three 16-bit timer/counters 256 Bytes of on-chip data RAM 64 Kbytes on-chip Flash memory 32 Programmable I/O lines 6 interrupt Sources - - - - - - - Code protection Two priority levels Power saving Idle and power down modes 64 K external program memory space 64 K external data memory space Four 8-bit I/O ports Full-duplex enhanced UART patible with the standard 80C51 and the 80C52 GENERAL DESCRIPTION The single-chip 8-bit microcontroller is manufactured in MXIC's advanced CMOS process. This device uses the same powerful instruction set, has the same architecture, and is pin-to-pin patible with the existing 80C51. The added features make it an even more powerful microcontroller for applications that require clock output, and up/down counting capabilities such as motor control. It also has a more versatile serial channel that facilitates multi-processor munications. PIN CONFIGURATIONS 44 PLCC VCC P1.4 P1.3 P1.2 P1.1 P1.0 P0.0 P0.1 P0.2 P0.3 40 39 P0.4 P0.5 P0.6 P0.7 EA 12 34 N.C. ALE PSEN P2.7 P2.6 17 18 P3.6 P3.7 XTAL2 XTAL1 VSS 23 N.C. P2.0 P2.1 P2.2 P2.3 29 28 P2.4 P2.5 N.C. 1 P1.5 P1.6 P1.7 RST P3.0 N.C. P3.1 P3.2 P3.3 P3.4 P3.5 P/N:PM0626 REV. 0.1, DEC. 17, 1999 .. BLOCK DIAGRAM P0.0-P0.7 P2.0-P2.7 Vcc Vss PORT 0 DRIVERS PORT 2 DRIVERS RAM ADDR. REGISTER PORT 0 LATCH PORT 2 LATCH STACK POINTER TMP1 PROGRAM ADDR. REGISTER TMP2 B REGISTER ALU BUFFER PC INCREMENTER T0/T1/T2 SFRs TIMERS PROGRAM COUNTER PSEN ALE EA RST TIMING AND CONTROL INSTRUCTION REGISTER DPTR PORT 1 LATCH PORT 3...