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MX23L6410ATC-90 - 64M-BIT PAGE MODE MASK ROM

Download the MX23L6410ATC-90 datasheet PDF. This datasheet also covers the MX23L6410A variant, as both devices belong to the same 64m-bit page mode mask rom family and are provided as variant models within a single manufacturer datasheet.

General Description

Symbol A0~A21 D0~D14 D15/A-1 CE# OE# BYTE# VCC VSS NC Pin Function Address Inputs Data Outputs D15 (Word Mode)/ LSB Address (Byte Mode) Chip Enable Input Output Enable Input Word/ Byte Mode Selection Power Supply Pin Ground Pin No Connection 48 VSS 47 VSS 46 D15/A-1 45 D7 44 D14 43 D6 42 D13 41 D

Key Features

  • Bit organization - 8M x 8 (byte mode) - 4M x 16 (word mode).
  • Fast access time - Random access:70ns (max. ) - Page access:25ns (max. ).
  • Page size - 8 words per page.
  • Current - Operating:20mA - Standby:15uA.
  • Supply voltage - 2.7V ~ 3.6V.
  • Package - 48 pin TSOP (12mm x 20mm).
  • Temperature - 0°C ~ 70°C.
  • Process - 0.18um PIN.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MX23L6410A_MacronixInternational.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FEATURES • Bit organization - 8M x 8 (byte mode) - 4M x 16 (word mode) • Fast access time - Random access:70ns (max.) - Page access:25ns (max.) • Page size - 8 words per page • Current - Operating:20mA - Standby:15uA • Supply voltage - 2.7V ~ 3.6V • Package - 48 pin TSOP (12mm x 20mm) • Temperature - 0°C ~ 70°C • Process - 0.18um PIN CONFIGURATION 48 TSOP (Top View) BYTE# A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 ORDER INFORMATION Part No.