MAX1181 Datasheet | Maxim Integrated

19-2093; Rev 1; 2/07 KIT .. ATION EVALU E L B AVAILA Dual 10-Bit, 80Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs General Description Features - Single 3V Operation - Excellent Dynamic Performance 59d B SNR at f IN = 20MHz 73d B SFDR at f IN = 20MHz - Low Power 82m A (Normal Operation) 2.8m A (Sleep Mode) 1µA (Shutdown Mode) - 0.02d B Gain and 0.25° Phase Matching (typ) - Wide ±1VP-P Differential Analog Input Voltage Range - 400MHz, -3d B Input Bandwidth - On-Chip 2.048V Precision Bandgap Reference - User-Selectable Output Format- Two’s plement or Offset Binary - 48-Pin TQFP Package with Exposed Pad for Improved Thermal Dissipation - Evaluation Kit Available The MAX1181 is a 3V, dual 10-bit, analog-to-digital converter (ADC) featuring fully-differential wideband track-and-hold (T/H) inputs, driving two pipelined, ninestage ADCs. The MAX1181 is optimized for low-power, high-dynamic performance applications in imaging, instrumentation, and digital munication applications. The MAX1181 operates from a single 2.7V to 3.6V supply, consuming only 246m W, while delivering a typical signal-to-noise ratio (SNR) of 59d B at an input frequency of 20MHz and a sampling rate of 80Msps. The T/H driven input stages incorporate 400MHz (-3d B) input amplifiers. The converters may also be operated with single-ended inputs. In addition to low operating power, the MAX1181 Features a 2.8m A sleep mode, as well as a 1µA power-down mode to conserve power during idle periods. An internal 2.048V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of the internal or external reference, if desired for applications requiring increased accuracy or a different input voltage range. The MAX1181 Features parallel, CMOS-patible three-state outputs. The digital output format is set to two’s plement or straight offset binary through a single control pin. The device provides for a separate...