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MAX3878 - Clock and Data Retiming ICs

Download the MAX3878 datasheet PDF. This datasheet also covers the MAX3877 variant, as both devices belong to the same clock and data retiming ics family and are provided as variant models within a single manufacturer datasheet.

General Description

The MAX3877/MAX3878 are compact, low-power clock recovery and data retiming ICs for 2.488Gbps SONET/ SDH applications.

The fully integrated phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input, which is retimed by the recovered clock.

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Note: The manufacturer provides a single datasheet file (MAX3877_MaximIntegratedProducts.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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19-2062; Rev 0; 5/01 MAX3877/MAX3878 2.5Gbps, +3.3V Clock and Data Retiming ICs with Vertical Threshold Adjust General Description The MAX3877/MAX3878 are compact, low-power clock recovery and data retiming ICs for 2.488Gbps SONET/ SDH applications. The fully integrated phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input, which is retimed by the recovered clock. An additional 2.488Gbps serial input is available for system loopback diagnostic testing, or this input can be connected to a 155MHz reference clock to maintain a valid clock output in the absence of data transitions. The MAX3877/MAX3878 provide vertical threshold and phase-adjust control to optimize system BER in DWDM applications.