MAX3882 Datasheet PDF | Maxim Integrated

Maxim Integrated MAX3882

The MAX3882 is a deserializer combined with clock and data recovery and limiting amplifier ideal for converting 2.488Gbps/2.67Gbps serial data to 4-bit-wide, 622Mbps/667Mbps parallel data for SDH/SONET applications. The device accepts serial NRZ input data as low as 10mVP-P of 2.488Gbps/2.67Gbps and generates four parallel LVDS data outputs at 622Mbps/667Mbps. For data acquisition, the MAX3882 does not require an external reference clock.

Part No.	MAX3882
Datasheet	MAX3882 Download
Manufacturer	Maxim Integrated
Description	2.488Gbps/2.67Gbps 1:4 Demultiplexer
Buy	Stock & Price

GENERAL DESCRIPTION

Included is an additional high-speed serial data input for system loopback diagnostic testing. However, if needed, the loopback input can be connected to an external reference clock of 155MHz/167MHz or 622MHz/667MHz to maintain a valid clock output in the absence of input data transitions. Additionally, a TTL-compatible loss-of-lock output is provided. The device provides a vertical threshold adjustment to compensate for optical noise generated by EDFAs in WDM transmission systems. The MAX3882 operates from a single +3.3V supply and consumes 610mW. The MAX3882’s jitter performance exceeds all SDH/ SONET specifications. The device is available in a 6mm ✕ 6mm 36-pin QFN package.

FEATURES

o No Reference Clock Required for Data Acquisition o Input Data Rates: 2.488Gbps or 2.67Gbps o Fully Integrated Clock and Data Recovery with Limiting Amplifier and 1:4 Demultiplexer o Parallel Output Rate: 622Mbps/667Mbps o Differential Input Range: 10mVP-P to 1.6VP-P without Threshol...