GENERAL DESCRIPTION
Included is an additional high-speed serial data input for system loopback diagnostic testing. However, if needed, the loopback input can be connected to an external reference clock of 155MHz or 622MHz to maintain a valid clock output in the absence of input data transitions. Additionally, a TTL-compatible loss-of-lock output is provided. The device provides a vertical threshold adjustment to compensate for optical noise generated by EDFAs in WDM transmission systems. The MAX3882A operates from a single +3.3V supply and consumes 610mW. The MAX3882A’s jitter performance exceeds all SDH/ SONET specifications. The device is available in a 6mm ✕ 6mm, 36-pin TQFN package. FEATURES
♦ No Reference Clock Required for Data Acquisition ♦ Serial Input Rate: 2.488Gbps ♦ Fully Integrated Clock and Data Recovery with Limiting Amplifier and 1:4 Demultiplexer ♦ Parallel Output Rate: 622Mbps ♦ Differential Input Range: 10mVP-P to 1.6VP-P without Threshold Adjust ♦ Differential Input...