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MAX9126 - Quad LVDS Line Receivers

Download the MAX9126 datasheet PDF. This datasheet also covers the MAX9125 variant, as both devices belong to the same quad lvds line receivers family and are provided as variant models within a single manufacturer datasheet.

General Description

The MAX9125/MAX9126 quad low-voltage differential signaling (LVDS) line receivers are ideal for applications requiring high data rates, low power, and reduced noise.

Key Features

  • integrated parallel termination resistors (nominally 115Ω), which eliminate the requirement for four discrete termination resistors and reduce stub length. The MAX9125 inputs are high impedance and require an external termination resistor when used in a point-to-point connection. The devices support a wide common-mode input range of 0.05V to 2.35V, allowing f.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MAX9125_MaximIntegratedProducts.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MAX9125/MAX9126 19-1908; Rev 0; 5/01 EVAALVUAAILTAIOBNLEKIT Quad LVDS Line Receivers with Integrated Termination General Description The MAX9125/MAX9126 quad low-voltage differential signaling (LVDS) line receivers are ideal for applications requiring high data rates, low power, and reduced noise. The MAX9125/MAX9126 are guaranteed to receive data at speeds up to 500Mbps (250MHz) over controlled-impedance media of approximately 100Ω. The transmission media may be printed circuit (PC) board traces or cables. The MAX9125/MAX9126 accept four LVDS differential inputs and translate them to 3.3V CMOS outputs. The MAX9126 features integrated parallel termination resistors (nominally 115Ω), which eliminate the requirement for four discrete termination resistors and reduce stub length.