MAX19710 Datasheet | Maxim Integrated

19-0526; Rev 0; 5/06 KIT ATION EVALU E L B AVAILA 10-Bit, 7.5Msps, Full-Duplex Analog Front-End General Description Features - Dual 10-Bit, 7.5Msps Rx ADC and Dual 10-Bit, 7.5Msps Tx DAC - Ultra-Low Power 30m W at f CLK = 7.5MHz, FD Mode 21.3m W at f CLK = 7.5MHz, Slow Rx Mode 21.9m W at f CLK = 7.5MHz, Slow Tx Mode Low-Current Standby and Shutdown Modes - Programmable Tx DAC mon-Mode DC Level and I/Q Offset Trim - Excellent Dynamic Performance SNR = 54.9d B at f IN = 3.3MHz (Rx ADC) SFDR = 73.8d Bc at f OUT = 620k Hz (Tx DAC) - Three 12-Bit, 1μs Aux-DACs - 10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and Data Averaging - Excellent Gain/Phase Match ±0.01° Phase, ±0.01d B Gain (Rx ADC) at f IN = 1.8MHz - Multiplexed Parallel Digital I/O - Serial-Interface Control - Versatile Power-Control Circuits Shutdown, Standby, Idle, Tx/Rx Disable - Miniature 56-Pin Thin QFN Package (7mm x 7mm x 0.8mm) The MAX19710 is an ultra-low-power, highly integrated mixed-signal analog front-end (AFE) ideal for wideband munication applications operating in full-duplex (FD) mode. Optimized for high dynamic performance and ultra-low power, the device integrates a dual 10-bit, 7.5Msps receive (Rx) ADC; dual 10-bit, 7.5Msps transmit (Tx) DAC; three fast-settling 12-bit aux-DAC channels for ancillary RF front-end control; and a 10-bit, 333ksps housekeeping aux-ADC. The typical operating power in FD mode is 30m W at a 7.5MHz clock frequency. The Rx ADCs feature 54.8d B SINAD and 79.8d Bc SFDR at 3.3MHz input frequency with a 7.5MHz clock frequency. The analog I/Q input amplifiers are fully differential and accept 1.024VP-P full-scale signals. Typical I/Q channel matching is ±0.01° phase and ±0.01d B gain. The Tx DACs feature 73.8d Bc SFDR at f OUT = 620k Hz and f CLK = 7.5MHz. The analog I-Q full-scale output voltage range is ±400m V differential. The output DC mon-mode voltage is from 0.89V to 1.36V. The I/Q channel offset is adjustable to optimize radio lineup sideband/carrier suppression....