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MAX9321B - Differential PECL/ECL/LVPECL/LVECL Receiver/Driver

General Description

The MAX9321B low-skew differential receiver/driver is designed for clock and data distribution.

The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage.

Key Features

  • ultra-low propagation delay (172ps) and part-to-part skew (20ps) with 24mA maximum supply current, making this device ideal for clock buffering or repeating. For interfacing to differential PECL and LVPECL signals, these devices operate over a +3.0V to +5.5V supply range, allowing high-performance clock and data distribution in systems with a nominal 3.3V or 5.0V supply. For differential ECL and LVECL operation, this device operates from a -3.0V to -5.5V supply. The MAX9321B is offered in indust.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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19-2384; Rev 0; 4/02 Differential PECL/ECL/LVPECL/LVECL Receiver/Driver General Description The MAX9321B low-skew differential receiver/driver is designed for clock and data distribution. The differential input can be adapted to accept a single-ended input by connecting the on-chip VBB supply to an input as a reference voltage. The MAX9321B features ultra-low propagation delay (172ps) and part-to-part skew (20ps) with 24mA maximum supply current, making this device ideal for clock buffering or repeating. For interfacing to differential PECL and LVPECL signals, these devices operate over a +3.0V to +5.5V supply range, allowing high-performance clock and data distribution in systems with a nominal 3.3V or 5.0V supply. For differential ECL and LVECL operation, this device operates from a -3.