MPC82L54
Overview
- 1-T 80C51 Central Processing Unit
- MPC82E/L54 with 15.5K Bytes flash ROM ━ ISP memory zone could be optioned as 1.5KB, 2.5KB or 3.5KB ━ Two level code protections for flash memory access ━ Flash write/erase cycle: 20,000 ━ Flash data retention: 100 years at 25℃ ━ MPC82E/L54 Flash space mapping (Default); AP Flash（0000h~33FFh）; IAP Flash（3400h~37FFh）; ISP Flash（3800h~3DFFh）（ISP Boot code）
- On-chip 256 bytes scratch-pad RAM and 256 bytes expanded RAM (XRAM)
- Interrupt controller ━ 7 sources, four-level-priority interrupt capability ━ Two external interrupt inputs, INT0 and INT1
- Two 16-bit timer/coun
