• Part: KSZ8862-16MQL
  • Description: 2-Port Ethernet Switch
  • Manufacturer: Micrel Semiconductor
  • Size: 952.57 KB
Download KSZ8862-16MQL Datasheet PDF
Micrel Semiconductor
KSZ8862-16MQL
KSZ8862-16MQL is 2-Port Ethernet Switch manufactured by Micrel Semiconductor.
Description The KSZ8862M is 2-port switch with non-PCI CPU interface and fiber support, and is available in 8/16-bit and 32-bit bus designs (see Ordering Information). This datasheet describes the KSZ8862M non-PCI CPU interface chip. The KSZ8862M is the industry’s first fully managed, 2port switch with a non-PCI CPU interface and fiber th support. It is based on a proven, 4 generation, integrated Layer-2 switch, pliant with IEEE 802.3u standards. For industrial applications, the KSZ8862M can run in half-duplex mode regardless of the application. In fiber mode, port 1 can be configurable to either 100BASE-FX or 100BASE-SX/10BASE-FL. The LED driver and post amplifier are also included for 10Base-FL and 100Base-SX applications. Link MD ® In copper mode, port 2 supports 10/100BASE-T/TX with HP Auto MDI/MDI-X for reliable detection of and correction for straight-through and crossover cables. ® Micrel’s proprietary Link MD Time Domain Reflectometry (TDR)-based function is also available for determining the cable length, as well as cable diagnostics for identifying faulty cabling. The KSZ8862M offers an extensive feature set that includes tag/port-based VLAN, quality of service (Qo S) priority management, management information base (MIB) counters, and CPU control/data interfaces to effectively address Fast Ethernet applications. The KSZ8862M contains: Two 10/100 transceivers with patented, mixed-signal, low-power technology, two media access control (MAC) units, a direct memory access (DMA) channel, a high-speed, non-blocking, switch fabric, a dedicated 1K entry forwarding table, and an on-chip frame buffer memory. Functional Diagram TX P o rt 1 F ib e r RX P o rt 2 Copper LED D r iv e r Post Am p 1 0 /1 0 0 B a s e F L /F X /S X PHY 1 1 0 /1 0 0 MAC 1 1 K lo o k -u p E n g in e FIFO, Flow Control, VLAN Tagging ,Priority 1 0 /1 0 0 B a s e T /T X PHY 2 1 0 /1 0 0 MAC 2 S c h e d u lin g M anagem ent E m bedded P r o c e s s o r In te r fa c e N o n -P C I CPU Bus In...